;==============================================================================
; MSP430 Floating Point Package Version 4.0
;
; Definitions
; Texas Instruments Deutschland
; Date: January, 6 1997
; Version: 4.05
; 4.0 Inclusion of hardware multiplier MACROs
; Inclusion of default settings
;==============================================================================
; Predefinition (default settings) of switch directives (FRGR 09/97)
.if $IsDefed("DOUBLE") = 0
DOUBLE .set 0 ; 0: use .FLOAT format FPP
.endif
.if $IsDefed("SW_UFLOW") = 0
SW_UFLOW .set 0 ; 0: underflow is no error
.endif
.if $IsDefed("SW_RND") = 0
SW_RND .set 1 ; 1: use rounding for conversions
.endif
.if $IsDefed("HW_MPY") = 0
HW_MPY .set 0 ; 0: no use of the hardware multiplier
.endif
; Register Definitions for the Floating Point Subroutines
.if DOUBLE=1 ;
ARG1_MSB .equ R5 ; Argument1
ARG1_MID .equ R6
ARG1_LSB .equ R7
ARG2_MSB .equ R8 ; Argument2
ARG2_MID .equ R9
ARG2_LSB .equ R10
RESULT_MSB .equ R11 ; Result
RESULT_MID .equ R12
RESULT_LSB .equ R13
HELP .equ R14 ; Help register
COUNTER .equ R15 ; Loop counter
ML .equ 40 ; Length of mantissa 40 bits
.else
ARG1_MSB .equ R5 ; Argument1
ARG1_LSB .equ R6
ARG2_MSB .equ R7 ; Argument2
ARG2_LSB .equ R8
RESULT_MSB .equ R9 ; Result
RESULT_LSB .equ R10
HELP .equ R11 ; Help register
COUNTER .equ R12 ; Loop counter
ML .equ 24 ; Length of mantissa 24 bits
.endif
; Definition for the argument/result-pointers and the Status Register Bits
RPARG .set ARG1_MSB ; Pointer to Argument1
RPRES .set RESULT_MSB ; Pointer to Argument2
FN .set 4 ; Negative bit N in SR
FZ .set 2 ; Zero bit Z in SR
FC .set 1 ; Carry bit C in SR
; Define FPP operations for the Linker
.global FLT_ADD
.global FLT_SUB
.global FLT_MUL
.global FLT_DIV
.global FLT_CMP
.global FLT_SAV
.global FLT_REC
.global FLT_END
; Register Definitions for the Conversion Subroutines
.if DOUBLE=1 ;
BCD_MSB .equ ARG2_MSB ; BCD-buffer 48 bits MSBs
BCD_MID .equ ARG2_MID ;
BCD_LSB .equ ARG2_LSB ; LSBs
BIN_MSB .equ RESULT_MSB ; Binary buffer 48 bits MSBs
BIN_MID .equ RESULT_MID ;
BIN_LSB .equ RESULT_LSB ; LSBs
.else
BCD_MSB .equ ARG1_MSB ; BCD-buffer 48 bits MSBs
BCD_MID .equ ARG1_LSB ;
BCD_LSB .equ ARG2_MSB ; LSBs
BIN_MSB .equ RESULT_MSB ; Binary buffer 48 bits MSBs
BIN_MID .equ RESULT_LSB ;
BIN_LSB .equ ARG2_LSB ; LSBs
.endif
; Define Conversion Subroutines for the Linker
.global CNV_BIN40
.global CNV_BIN32
.global CNV_BIN32U
.global CNV_BIN16
.global CNV_BIN16U
.global CNV_BIN
.global CNV_FP_BIN
.global CNV_BCD_FP
.global CNV_FP_BCD
;
; Macro Definitions for the hardware multiplier
;
.if HW_MPY=1 ;
ResLo .equ 013Ah ; Result Register lower 16 bits
ResHi .equ 013Ch ; Result Register upper 16 bits
SumExt .equ 013Eh ; Result Register carry/extended sign
;
MPY .macro arg1,arg2 ; Unsigned MPY 16x16 bits
MOV arg1,&0130h ; Operand 1 to "Unsigned MPY Register"
MOV arg2,&0138h ; Operand 2 to "Start MPY Register"
.endm ; Result in ResHi|ResLo
MAC .macro arg1,arg2 ; MPY and accumulate 16x16 bits (unsigned)
MOV arg1,&0134h ; Operand 1 to "MPY and Accum. Register"
MOV arg2,&0138h ; Operand 2 to "Start MPY Register"
.endm ; Result in SumExt|ResHi|ResLo
.endif
; END OF THE FLOATING POINT PACKAGE DEFINITIONS
